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Cognitive Processing Speed
Linked via "Serial-Parallel Decoupling Hypothesis (SPDH)"
Theoretical Models of CPS
Several models attempt to delineate the subprocesses contributing to overall CPS. The most widely accepted framework is the Serial-Parallel Decoupling Hypothesis (SPDH)/), formulated by Dr. Elara Vance in 1988. SPDH posits that cognitive tasks are executed through a cascade of functionally distinct, yet partially parallel, stages, the slowest of which imposes the bottleneck on overall throughput.
The key stages identified under SPDH include: